1. Field of the Invention
The present invention relates to a semiconductor device and a manufacturing method of the same, a lead frame employed in the semiconductor device, and a memory card and a manufacturing method of the same. More particularly, the invention is concerned with a semiconductor device and a manufacturing method of the same, a lead frame used in manufacturing the semiconductor device and a memory card composed of the semiconductor device or devices and a method of manufacturing the memory card which is suited for implementing the semiconductor device and the memory card in a thin structure.
2. Description of the Prior Art
In the manufacture of a semiconductor device known heretofore, a semiconductor element is disposed on a surface of a semiconductor element mounting plate referred to as a tab which surface is applied with a bonding resin layer. In other words, the semiconductor element is bonded at the bottom surface thereof to the tab. Subsequently, the assembly including the tab and the semiconductor element undergoes several processing steps such as wire bonding, after which the assembly is sealed by a sealing resin to complete a semiconductor device. As an example of the thin semiconductor device realized by resorting to the technique outlined above, there has already been reported a semiconductor device having a thickness of 1 mm.
Further, as the semiconductor devices where the tab is spared, there are known device structures in which a semiconductor element and inner tip end portions of leads are buried in a resin sheet for thereby enhancing temperature cycle withstanding capability (refer to, for example, JP-A-60-97645), a device in which a semiconductor element and inner tip ends of the leads are bonded together at the opposite sides (opposite lateral surfaces) thereof by using a bonding resin (refer to, for example, JP-A-H1-220464) and others.
The tab which has been used in the prior art method of manufacturing the semiconductor device must be mounted with a semiconductor element with a bonding resin layer being interposed therebetween. Under the circumstances, a sum of thicknesses of the tab, the bonding resin layer and the semiconductor element can amount to a value in the range of 0.6 to 0.7 mm in the present state of the technique. Further, taking into consideration the height of the wires for bonding, resin flow balance upon resin sealing and other factors, the attempt for reducing the thickness of the semiconductor device to a value smaller than 1 mm will encounter a great difficulty.
The technique disclosed in JP-A-60-67645, is inherently and basically concerned with a method of mounting a semiconductor element on a sheet of resin. Thus, it is practically impossible to reduce the thickness of the semiconductor device by relying on this prior art method.
According to the technique disclosed in JP-A1-220464, a semiconductor device can certainly be implemented in a thin structure because the thickness of the lead frame and the bonding resin layer can be accommodated or absorbed by the thickness of a semiconductor element. However, since the bonding resin has to be applied to the inner tip ends of the leads, there may arise some problems that the wire bonding becomes difficult, the plane of the leads is caused to bulge upwardly and/or positional misalignment or diversity may occur among the inner lead end portions after the bonding.